08 March 2014

JFET biasing experiments

My next project will be to build an RF signal generator. My plan is to build the general purpose oscillator as per Fig 7.27 in EMRFD. This design topology calls for a Hartley design using the 2N4416 JFET. Since I don't have a 2N4416 to hand I wanted to better understand JFET characteristics in order to find a substitute. Understanding that the output power attainable from the oscillator will depend on the Vp and Idss values. The bigger each of these are the more power can be derived.

I based my experiments on the method outlined in JFET bias experiments on the QRP Homebuilder website http://www.qrp.pops.net/jfet-bias-2006.asp . I built a test fixture in line with the write up and using regular 5% tolerance resistors in order to vary the source resistance and thus the drain current. This would allow me to derive the transfer characteristics of the JFET through measured values. I could then compare it with the FET equation and also establish the pinch off voltage Vp and Idss.

I first measured the resistors as follows.

Value(marked)            Keithley(Ohms)          Fluke(Ohms)    Difference (Ohms)  Percent (of Keithley)
10K                               9.89                        9.86                   30                           0.3%
6.8K                              6.78                        6.75                   30                           0.4%
3.3K                              3.26                        3.24                   20                           0.6%
2.7K                              2.66                        2.64                   20                           0.8%
1K                                 976                         974                     2                            0.2%
680                                670                         671                     1                            0.1%
560                                555                         552                     3                            0.5%
330                                327                         324                     3                            0.9%
150                                150                         149                     1                            0.7%
100                                101                           99                     2                            1.0%
68                                   69                           68                      1                            1.5%
39                                   41                           39                      2                            4.9%
22                                   24                           22                      2                            8.3%

In spite of the variance at lower resistances I decided to go with the Keithley readings as a first pass.

Once the source resistance was lowered below 560 Ohms it became difficult to take measurements due to thermal drift.

Sample 1 as shown below was an MFP102 FET.

The result shows the measured transfer curve (in BLUE) which does not look like a JFET curve as per the Basic FET equation RED curve below.

Looking at the specifications for the MPF102, Idss varies between 2mA and 20mA. The spec does not show a Vp but something called a Vgs (gate-source cutoff voltage) for Vds = 15V, Id=200uA. of -0.5V to -7.5V. For this sample at Id=245uA and Vs=2.2volts. Thus Vds=10.1-2.2 = 7.9V. Vds seems low for a Vd-d of 10.1 volts.

Repeat the experiment to confirm this result. Consider that parasitic oscillation may be taking place. Insert a ferrite bead in the drain lead.

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